---
title: MATLAB/Verylで異世界転生
tags: 
author: [ds54e](https://docswell.com/user/ds54e)
site: [Docswell](https://www.docswell.com/)
thumbnail: https://bcdn.docswell.com/page/PEX3MNQYJX.jpg?width=480
description: MATLAB/Verylで異世界転生 by ds54e
published: October 24, 26
canonical: https://docswell.com/s/ds54e/K4N7XD-2026-10-24-142010
---
# Page. 1

![Page Image](https://bcdn.docswell.com/page/PEX3MNQYJX.jpg)

MATLABとStateflowでLDOをMBDした私は、
VerylとRgGenをSV-RNMに添えてDMSを極めます
v1.0.1
RTLを語る会 (19)
@ds54e


# Page. 2

![Page Image](https://bcdn.docswell.com/page/3EKYGN94JD.jpg)

自己紹介をしよう


# Page. 3

![Page Image](https://bcdn.docswell.com/page/L739NVWD75.jpg)

MATLABでかんがえよう
FSM
モデル
VDET
LDO
モデル
MATLAB and Simulink Home Suite $105
+ Stateflow $29 = $134 = ¥21,029


# Page. 4

![Page Image](https://bcdn.docswell.com/page/87DGW8K27G.jpg)

Veryl ¥0
Verylでかいてみよう
always_ff (clk, rst) {
if_reset {
// Stateflow: WAIT/ON -&gt; OFF [rst]
state_q = State::OFF;
RST
pgood_q = 0;
high_cnt = CNT_CLEAR;
} else {
if (!en) {
// Stateflow: WAIT/ON -&gt; OFF [~en]
!EN
state_q = State::OFF;
pgood_q = 0;
high_cnt = CNT_CLEAR;
} else if (!pg_cmp) {
// Stateflow: OFF -&gt; WAIT [en &amp;&amp; ~rst], ON -&gt; WAIT [~pg_cmp]
state_q = State::WAIT;
pgood_q = 0;
high_cnt = CNT_CLEAR;
} else if (state_q == State::ON) {
...
!PG_CMP


# Page. 5

![Page Image](https://bcdn.docswell.com/page/VJP398KLE8.jpg)

RgGen ¥0
RgGenでつくろう
register_blocks:
- name: ldo_csr
byte_size: 8
registers:
- name: ctrl
offset_address: 0x00
bit_fields:
- name: en
bit_assignment: { width: 1, lsb: 0 }
type: rw
initial_value: 0
- name: status
offset_address: 0x04
bit_fields:
- name: pgood
bit_assignment: { width: 1, lsb: 0 }
type: ro
RgGen
RgGen
RgGen


# Page. 6

![Page Image](https://bcdn.docswell.com/page/2EV4MNV6JQ.jpg)

Xezim ¥0
Xezimでうごかそう


# Page. 7

![Page Image](https://bcdn.docswell.com/page/57G1GKL2EL.jpg)

SDIでくらべよう
load_hi = 1
en = 1
load_hi = 0
load_hi = 0


# Page. 8

![Page Image](https://bcdn.docswell.com/page/4EQDXNY9JP.jpg)

Claude $20
AIにこのExampleを食わせて人間
は惰眠を貪り滲み出す混濁の紋章
不遜なる狂気の器湧き上がり・否定
し 痺れ・瞬き 眠りを妨げる爬行する
鉄の王女 絶えず自壊する泥の人形
結合せよ 反発せよ 地に満ち己の無
力を知れ破道の九十、黒棺
https://github.com/ds54e/talkrtl-19-matlab-veryl


# Page. 9

![Page Image](https://bcdn.docswell.com/page/KJ4Z6GZR71.jpg)

MATLABはいいぞ（ダイマ）
Verylもいいぞ（擦り寄り）
DMSもたのしいゾ！！！
（※個人の感想です。効果には個人差があります）
RTLを語る会 (19)
@ds54e


